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This project simulates the process of demand paging in a virtual memory system, including the use of a Translation Lookaside Buffer (TLB) to speed up memory access. The TLB is a small, fast cache that stores recent mappings of virtual memory addresses to physical memory addresses.

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Freddy10035/DemandPagingWithTLB

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Getting Started

Clone the repository to your local machine Navigate to the project directory and build the simulation by running the command make

Usage:

./main [inputfile] [page table size] [TLB size] [page replacement algorithm]

where:

  • inputfile is the name of the input file containing the virtual memory address traces
  • page table size is the number of pages that can be stored in the page table (in pages)
  • TLB size is the number of entries in the TLB (in pages)
  • page replacement algorithm is the algorithm to use for page replacement. Possible options are FIFO, LRU, OPT.
  • The output of the simulation will include statistics on the number of page faults, the TLB hit rate, and the page replacement algorithm used.

NOTE: Find the sample input files in the Input folder

Dependencies

g++ (or any c++ compiler)

Input format

The input file should contain a list of virtual memory addresses, one per line. Each address should be a decimal number.

Page Replacement Algorithms

FIFO: First-In, First-Out algorithm
LRU: Least Recently Used algorithm
OPT: Optimal Page Replacement algorithm

About

This project simulates the process of demand paging in a virtual memory system, including the use of a Translation Lookaside Buffer (TLB) to speed up memory access. The TLB is a small, fast cache that stores recent mappings of virtual memory addresses to physical memory addresses.

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