Pinned Loading

1. PAM_baseband_modulation PAM_baseband_modulation Public

   A baseband digital modulator, a Gaussian additive white noise channel and a baseband digital demodulator are simulated.

   MATLAB 1 1

2. Paths_Timing_Verification Paths_Timing_Verification Public

   A behavioral description of a 4-mode counter is implemented in Verilog. This description will serve as a detailed and formal specification of the operation of the designed device, then verilog timi…

   Verilog 1

3. PCIe-Switching-class-route-module PCIe-Switching-class-route-module Public

   Project 2 of the EIE UCR Digital Circuits 2 course, an adaptation of the switching layer by class and route of the PCIe standard is implemented.

   Coq

4. verification_environment verification_environment Public

   Implementation of a specific verification environment for three modules called counters A, B and C, in synthesized structural design. It corresponds to an assignment on verification and tests of th…

   Verilog

5. brown9804/NexysDDR4-RISC-V_picorv32 brown9804/NexysDDR4-RISC-V_picorv32 Public

   Using VIVADO, Nexys DDR 4 board with RISC-V PicoRV32 CPU

   Verilog 2 4