Skip to content

NanoboyAdvance 1.3
Compare
Choose a tag to compare
@fleroviux fleroviux released this 01 Feb 00:20
· 757 commits to master since this release
1.3
ac8ec5d
  • ARM: handle CMP, CMN, TST and TEQ with rD = 15
  • ARM: handle mode switches when the register bank does not change.
  • ARM: removed errorneous user-mode switch from LDRT/STRT opcodes.
  • DMA: allow DMAs to take priority over the CPU in the middle of an instruction
  • DMA: delay DMA startup by two cycles and account for 2I internal cycles
  • DMA: force ROM accesses to increment source address mode
  • DMA: respect source address mode setting for FIFO DMA
  • DMA: force FIFO DMA to use word sized accesses
  • DMA: handle manual disable (via enable flag) more gracefully
  • Timer: respect cascade flag in sample rate calculation
  • APU: emulate DAC enable bits (fixes #64)
  • PPU: match WIN0/1 trigger logic to hardware (thanks @destoer)
  • PPU: fix H-blank IRQ timing (once again)
  • PPU: better handle internal affine registers when multiple BG modes are used in a single frame.
  • PPU: handle invalid BG modes 6 and 7 (thanks @ladystarbreeze)
  • PPU: update internal affine & mosaic registers at the start of H-blank, not at the end.
  • MMIO: do not fallthrough on SOUNDBIAS writes (fixes #125)
  • Keypad: implemented keypad IRQ (thanks @destoer)
  • Serial: implemented a serial IRQ stub
  • SDL: always call glewInit() (fixes #129 )
  • SDL: use binary directory as current working directory
Assets 5
Loading